SDS7000A

Raises the guaranteed analogue bandwidth to the next model in the series, by key — no hardware change.

Raises the guaranteed analogue bandwidth to the next model in the series, by key — no hardware change.

Adds switching loss, safe operating area, harmonics and efficiency measurement to the oscilloscope.

Adds eye-diagram construction and jitter decomposition into random and deterministic components.

Activates the built-in function and arbitrary waveform generator inside the oscilloscope.

Runs the standard's prescribed compliance sequence automatically and reports pass/fail with evidence.

Runs the standard's prescribed compliance sequence automatically and reports pass/fail with evidence.

Runs the standard's prescribed compliance sequence automatically and reports pass/fail with evidence.

Runs the standard's prescribed compliance sequence automatically and reports pass/fail with evidence.

Runs the standard's prescribed compliance sequence automatically and reports pass/fail with evidence.

Trigger and decode for I²S audio and its LJ, RJ and TDM variants, as left/right sample values.

Trigger and decode for the MIL-STD-1553B avionics bus — command, status and data words.

Trigger and decode for the time-triggered FlexRay automotive bus, with cycle and slot structure.

Hardware trigger and on-screen decode for CAN FD, including the arbitration-to-data bit-rate switch.

Trigger and decode for SENT (SAE J2716) automotive sensors, which encode data in edge timing.

Trigger and decode for ARINC 429 avionics words — label, SDI, data, SSM and parity.

Trigger and decode for Manchester-encoded self-clocking serial data.

Trigger and decode for USB 2.0 packets, tokens, handshakes and payloads.

CAN XL decode in SIC and Fast mode, XL data phase to 20 Mbps — decode only.

2.5GBASE-T, 5GBASE-T and 10GBASE-T transmitter compliance to IEEE 802.3-2018, automated with the FX-MGETH fixture.

MIPI D-PHY compliance test to CTS 1.0: LP-TX and HS-TX signalling, clock-to-data timing and the eye test, automated.

DDR memory compliance test to the JEDEC specifications — clock, timing, electrical and eye-diagram tests, automated.

Spectrum Analyzer mode: real-time spectrum analysis, digital down-conversion and on-board SigVSA — A models only.

1 Gpts per channel in dual-channel mode, instead of the standard 500 Mpts — A models.

2 Gpts on one channel and 1 Gpts on two, on top of the AP models’ standard 1 Gpts — AP models.

USB 2.0 compliance test fixture for the SDS7000A — the hardware half of SDS7000A-CT-USB2.

100BASE-TX and 1000BASE-T Ethernet compliance test fixture for the SDS7000A — the hardware half of the CT-100BASE-T and CT-1000BASE-T options.

100BASE-T1 and 1000BASE-T1 automotive Ethernet compliance test fixture for the SDS7000A.

2.5G, 5G and 10GBASE-T multi-gigabit Ethernet compliance test fixture for the SDS7000A.